Jinks+ simulator: Configuration file explained




Functional Units

Funtional Units pipeline definition

Functional Unit
Name Pipeline
Op-codes
Bandwith
fu
ialu1
i
A,LO,SH,CV,M,D,SQ,C,R,CB,UB,CJ,UJ,SY 1
fu
falu5
fp
A,LO,SH,CV,M,D,SQ,MAC,CB,UB,CJ,UJ 1
fu
valu9
v
A,LO,SH,CV,M,D,SQ,MAC 2
fu
dport1
m
LD,ST,GT,SC 1
fu
iport
fe
IFETCH
1

Functional Units Operation and instruction supported

NEMONIC
OPERATION
DESCRIPTION
A arithmetic
LO logical

SH shift

CV cvt
Data Type Conversion
M mul
multiply
D div
Division
SQ sqrt
Square Root
C cbr
Conditional branches
R ret
Return from subroutines
CB cbr
Conditional branches
UB ubr
Unconditional branches
CJ cjmp
Conditional jumps
UJ ujmp
Unconditional jumps: jmp
SY sysc
PAL code?
LD load

ST store

GT gather

SC scatter

MAC mac
Multiply and accumulate

Definition and modification of functional units latency


Fetch Stage Configuration


Execution Stage

Register file definition


Register File Type
logical registers banks per port read ports write ports physical registers read latency write latency
-int:reg = 0:31 1
10
6
64
0
0
-fp:reg =
32:63 1
6
4
64
0
0
-vec:reg =
64:79 8
3
2
36
0
0
-vec:accreg =
96:97 1
2
1
8
0
0

Main Memory

RAMBUS Configuration



Bus_frecuency [Mhz] 200
Bus Bandwith 2
Uni/Bi-directional U
Dim[No chips] 8
N. Dimensions of RDRAM
1
Network Latency up [cycles] 49
Network Latency down [cycles] 49
Controller Latency [cycles] 2
Smart/Dummy SMART

Cache Memory

Data Cache fetch Strategy


Fecth Strategy
Option
Description
FETCH_VECTOR_CACHE   
0
Vector cache (default)   
FETCH_MULTI_ADDRESS 1
Multi-address generation
FETCH_COLLAPSING 2
Collapsing buffer
FETCH_CONVENTIONAL 3
Conventional cache Configuration

Cache Levels Configuration


Parameter
-cache:L1 
-cache:L2 -cache:I1
Name L1
L2
I1
Number of banks 8
1
4
Enabled /Disabled ENABLED
ENABLED
ENABLED
Numner of sons 0
1
4
Son1 NONE
L1
NONE
Son2 NONE
NONE
NONE
Son3 NONE
NONE
NONE
Parent
L2
NONE
L2
Inclusion NI
IN
NI
Copy Back / Write Trough
WT
CB
WT
Write Allocate / Write No Allocate
WNA
WNA
WNA
Number of sets
128
4096
256
Line Size
4
16
4
Bandwith
1
4
4
Associativity
2
2
2
Latency
1
10
1
Write Back Depth 8
8
2
Write Back Retire 4
4
2
Write Back 2port 1
1
1
MSHR entries
8
8
4
PRINT / FIXED FIXED
FIXED
FIXED


Mauricio Alvarez
10/09/2003